In the paper the outline of the modular, reconfigurable logic controller design is presented. As the initial specification, sequential function chart (SFC-1131) is considered, as well as its equivalent textual specification in structured text. The focused items of design are: modification of the initial specification of the controller by means of introducing separate control part, described as SFC without complex conditions of transitions and only with combinational qualifiers and outputs, and a data path on register transfer level. In the proposed design methodology, after "lifting" such kind of sound SFC is treated as a particular kind of modular control interpreted Petri net. It is first formally analysed, and later described and simulated in HDL environment. Such verified and tested behavioural specification is mapped directly into FPGA matrix structure of reconfigurable logic controller by using standard or dedicated synthesis tools. The dedicated data path is treated as a complex functional building block, which is combined from previously designed modules - IP cores