The data acquisition architecture for the tracking detector of the MECO experiment will consist of a preamplifier/discriminator feeding a buffered digitizer which will be controlled by programmed logic. The digitizer converts the timing and analog waveform into digital storage for later readout. In order to evaluate this conceptual design, a prototype system was assembled using an existing digitizer chip, which had similar characteristics to the one proposed for MECO. In this prototype system, the event readout sequence and trigger was controlled by a Xilinx FPGA, and gated data events were transferred for further processing to higher levels in the data stream. The system contained 64 input channels divided into 4 groups of 16 channels, and either anode or cathode signals could be processed. It could be operated in either an internal or external trigger mode. Test results are reported in this paper, including the maximum event rate, the system dead time, and the relationship between the system efficiency and the bitmap selection. Based on these test results, some improvements in the digitizer chip are discussed, and the specifications of our proposed digitizer are presented.