In order to simplify the data transmission radio receiver structure, decrease its hardware cost and improve its portability, the data transmission radio receiver system based on software defined radio (SDR) technique has been studied. On the basis of introducing the principle of π/4-DQPSK differential correlation demodulation, this paper realizes the demodulation module with VHDL, then verifies and optimizes the module. Concerning On the bit synchronization, we argued a new optimized algorithm, and then implemented and verified the algorithm in the receiver system. All programs have been downloaded into spartan3s400 to verify the chip function. The system satisfies the needs of 19.2kbit/s rates and BW of 25 kHz for the radio receiver.