Lateral field penetration in the buried oxide (BOX) and underlying substrate of fully depleted SOI MOSFETs is responsible for a dramatic increase of short-channel effects. An original compact model of the latter phenomena is proposed and used to explore optimized architectures of sub-100 nm transistors. Various architectures including the ground-plane MOSFET, are compared using a quasi-2D analysis in order to evaluate the contribution of the BOX to short-channel effects.