Kwartalnik Elektroniki i Telekomunikacji > 2006 > Vol. 52, z. 4 > 629-641
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journal ISSN : | 0867-6747 |
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Bibliography
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1. R. Woods, A. Cassidy, J. Gray: VLSI Architectures for Field Programmable Gate Arrays: A Case Study, www.icspat.com.
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2. R. Chotin, Y. Dumonteix, H. Mehrez: Use of Redundant Arithmetic on Architecture and Design of a High Performance DCT Macro-block Generator, www.asim.lip6.fr.
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3. K. Bukhari, G. Kuzmanov, S. Vassiliadis: DCT and IDCT Implementations on Different FPGA Technologies, www.stw.nl.