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Neural network applications on FPGAs at times require arithmetic operators that are either not available in the manufacturer's core library, or are complex operators made up of several elementary functions, requiring more resources than if they were built as single operators. In this work, we built an open-source, parameterized floating-point core generator named NnCore, for operators used as activation...
A Structured Application-specific Integrated Circuit (SASIC) is a programmable fabric in which a small set of masks are customized for a particular application, serving to reduce the associated non-recurring engineering cost (NRE). In this paper we describe the implementation of a SASIC logic cell which is programmable via a single metal layer. A SASIC fabric prototype is fabricated and all implemented...
This paper presents a reconfigurable systolic array design suitable for multi-carrier wireless applications. The systolic array architecture includes coarse grained processing elements and interconnection switches. The systolic array can be configured as a Polyphase-FIR filter, DFT, Polyphase-DFT and IDFT-Polyphase function. A representative reconfigurable circuit has been designed and implemented...
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