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This paper presents an ESD-protected V-band (f0 at 58 GHz) low-noise amplifier (LNA) in 65-nm CMOS. Instead of using the conventional diode-based RF ESD design, a high current capability spiral inductor and a high breakdown MOM capacitor are employed as effective bi-directional ESD protection network, and also as part of the input matching by the co-design approach. The measured results demonstrate...
This paper presents a fully integrated low-power neuron recording front-end system in TSMC 65nm 1p6m CMOS technology. The proposed system is comprised of two recording modules, each containing 32 recording channels with tunable bandwidth and gain, a 32-to-1 multiplexer, one differential successive approximation register (SAR) analog-to-digital converter (ADC) with programmable sampling rate on each...
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