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We use the visibility graph analysis to research EEG signal and construct the complex network of EEG signal. In the paper, we construct the network by using EEG signal of the people with occupational stress and the normal people. Some properties of the complex network are found in this paper. The results of our experiment show that the properties of the normal people and the people with occupational...
The ultralow-k (ULK) dielectric materials are used in 40nm chip technologies to reduce RC delays and improve chip performances. The ULK materials have much higher porosity and become fragile in the mechanics. Fractures may take place due to the themal stress in typical packaging process, e.g. the flip chip reflow process. To evaluate the stresses and fracture behaviors in the ultralow-k chips, we...
Using ultralow-k (ULK) materials as inter-layer dielectrics (ILD) and inter-metal dielectrics (IMD) in copper connections were implemented to meet the electrical performance requirements in the advanced chips. ULK materials become fragile because tiny pores and inclusions were introduced to reduce the dielectric constant (k). As a result, the mechanical failures in ULK materials are critical during...
In this study, the drop test simulation for a typical stacked memory device with 8 units integrated vertically on board-level was performed by finite element method. The units were connected with each other through copper lead frames and assembled on the PCB by pins. The computational model of the device was built in ANSYS and the drop test of this board-level assembled device was investigated by...
The stacked memory device that combined eight single memory units in the vertical direction was investigated in this study when the device was subjected to the random vibrations. The fine computational model of the stacked memory with eight units assembled on board-level was built by ANSYS. The modal analysis was carried out first. By applying the power spectrum according to the GJB-548B standard,...
The stacked memory device that combined eight single memory units in the vertical direction was investigated in this study when the device was subjected to the random vibrations. The fine computational model of the stacked memory with eight units assembled on board-level was built by ANSYS. The modal analysis was carried out first. By applying the power spectrum according to the GJB-548B standard,...
In this study, the drop test simulation for a typical stacked memory device with 8 units integrated vertically on board-level was performed by finite element method. The units were connected with each other through copper lead frames and assembled on the PCB by pins. The computational model of the device was built in ANSYS and the drop test of this board-level assembled device was investigated by...
Higher packaging density is driven by the multi-functional requirements and size shrinkage in handheld applications, which was greatly improved by the 3D packaging technologies. Package-on-package (POP) is one of the 3D packaging solutions. In the POP, the package components can be fully tested good prior to integration. However, the structure of POP is much more complex than that of single package...
Wafer level Chip Scale Package (WLCSP) fulfills the demand for small, light, and portable handheld electronic devices, and it is one of the most advanced packaging concepts. When the WLCSP was assembled on board level, the connection, i.e. solder joints are generally the critical and challenging issue for the whole device's reliability. In addition to the shape and material of solder joints, the material...
The piezoelectric fiber composite actuators are new kind of piezoelectric actuators which have high mechanical performance and flexibility. In order to raise the induced strain of piezoelectric fiber composite actuators, two piezoelectric unit's construction equations about longitudinal length extension vibration mode are established. According to the construction equations for piezoelectric actuators,...
The Unity Bridge between Tanzania and Mozambique as the background project, the deviation block of external prestressing are analyzed with ANSYS software. When the deviators holes inner diameter are enlarged 1.5 times from 130 mm because the different deviators are applied, the concrete stresses and cracks state are introduced in detail, some suggestions for construction are presented. The results...
A four-cylinder diesel engine model is established using Pro/Engineer 3D modeling software. The model is loaded by ANSYS software. Grids meshes are imposed to the model with contact-settings and boundary conditions. Finite element analysis is performed on the contact-state of the diesel engine body. According to the minimum-zone principle for the flatness error analysis, Particle Swarm Optimization...
In plastic power devices, the interfaces of Cu/EMC are most likely to delaminate under thermal loading, especially when moisture diffuses into the interface through EMC. In this work, the bare die samples were fabricated in standard commercial process. Shear test of Cu/EMC interface was designed to measure the strength of the interface with different lead-frame oxidation and moisture absorption time...
Fast and nondestructive welding quality inspection on board-level BGA and PLCC devices is relatively difficult due to small size and special location of solder joints. In this study, a novel testing method combing Electronic Speckle Pattern Interferometry (ESPI) and Finite Element Analysis (FEA) was proposed to detect joint failures in surface-mount devices. ESPI technology was utilized to compare...
Vibro-acoustic combined environment is the main source of vibration during the launch and high-speed flight of aircraft, in order to determine the experimental standard, this paper will utilize the famous vibration and acoustic analysis software-LMS.SYSNOISE, and combine the large-scale finite element analysis software-MSC.PATRAN&NASTRAN, to carry out numerical simulation of random vibration from...
Steam-driven delamination failure is a main failure mode in electronics packages during solder reflow. Steam pressures built up within interfaces in packages are sensitive functions of the reflow temperature. The switch to lead-free soldering will raise re-flow temperature by more than 20degC and double the equilibrium saturated steam pressure within defects in the package. The effects of saturated...
The delamination of five-die stacked package with high humidity and high temperature processes was studied by experiments and finite element analysis in the paper. The package were tested by 85degC/85H/196hr condition and followed by solder reflow process. The testing results showed that the delamination was prevalent in samples. Combing the failure analysis of the stack-die package, the finite element...
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