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In this paper a two-terminal capacitive structure is presented in which a novel architecture with a double interleaved (interdigitated) scheme is introduced. This structure was originally conceived as a mechanism to achieve a greater capacitance between the plates (terminals) of an integrated capacitor using a relatively smaller design area in the standard 0.5µm, two polysilicon and three metal layers...
In this paper a quasi-floating-gate charge/discharge method is presented and a novel application for the widely used membrane-like RF-MEMS switches is proposed as well. The design of a four-beam capacitive MEMS structure is described within the 0.5 microns (2P3M) CMOS technology framework. Furthermore, the device is electromechanically simulated in the COMSOL Multiphysics suite and electrically simulated...
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