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Two performance gaps in the memory hierarchy, between CPU cache and main memory, and main memory and mass storage, will become increasingly severe bottlenecks for computing-system performance. Although it is necessary to increase memory capacity to fill these gaps, power also increases when conventional volatile memories are used. A new nonvolatile memory for this purpose has been anticipated. Storage...
Nonvolatile memory, spin-transfer torque magnetoresistive RAM (STT-MRAM) is being developed to realize nonvolatile working memory because it provides high-speed accesses, high endurance, and CMOS-logic compatibility. Furthermore, programming current has been reduced drastically by developing the advanced perpendicular STT-MRAM [1]. Several-megabit STT-MRAM with sub-5ns operation is demonstrated in...
This paper presents novel ultra-low power processor based on “Normally-off (N-off)” architecture, on which processors can remain in “off state” even during a short standby state. To realize “N-off” for high-performance (HP-) processors, we have developed novel STT-MRAM circuits and nonvolatile cache memories using them.
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