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We demonstrate an integration approach to enable 16nm half-pitch interconnects suitable for the 5nm technology node using 193i Lithography, SADP, SAQP, three times Litho-Etch (LE3) and tone-inversion. A silicon-verified DOE experiment on a SAQP process suggests a tight process window for core etch and spacer depositions. We also show a novel process flow which enable us to pattern tight-pitch metal-cut...
Silicon carbide (SiC) is more favorable than Silicon (Si) to build high voltage devices due its wider band-gap and higher critical field strength. Especially, the SiC MOSFETs are finding their niche in 1 kV range, which is currently dominated by Si IGBTs. This paper aims at demonstrating high power and high frequency operation of the SiC MOSFETs, as a means to evaluate the feasibility of using SiC...
In this paper the effect of pulsed current-voltage (ID-VGS) measurements on the hysteretic behavior of carbon nanotube field-effect transistors (CNTFET) on SiO2, and the subsequent mobility extraction is studied. It is found that hysteresis decreases with longer pulse delays and higher ambient temperature, and can be almost entirely eliminated at -10 s pulse intervals and -180 ??C. Moreover, mobility...
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