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Due to aggressive technology scaling, VLSI circuits are becoming increasingly susceptible to radiation-induced single-event-upsets (SEUs). Redundancy insertion has been adopted to provide the circuit with additional transient error resiliency. However, its applicability and efficiency are limited by the tight design constraints and budgets. In this paper, we present an intelligent ldquoconstraint-aware...
This paper addresses the aggregated effects of two types of variations that contribute to the reliability degradation. The first one is the increasing level of process variation; the second one is one particular type of environmental variation - the radiation-induced soft error. Their simultaneous presence can cause large negative performance impact. We present a statistical approach to model the...
Due to aggressive technology scaling, VLSI circuits are becoming increasingly susceptible to transient errors caused by single-event-upsets (SEUs). In this paper, we introduce two circuit-level techniques to efficiently yet economically improve SEU tolerance of static CMOS digital circuits. We also developed a "Robustness COmpiler (ROCO)" to integrate these techniques into the existing design...
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