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The task is to analyze, how different services can be designed for the SegBus multiprocessor platform and observe the improvement in system performance. In this paper, we utilize the concept of broadcasting and multicasting service from standard data bus for multiprocessor systems to enhance the performance of SegBus platform. The running example is represented by the H.264 encoder. The SegBus platform...
In this paper, we present novel network interface architecture for on-chip networks to increase memory parallelism and to improve the resource utilization. The proposed architecture exploits AXI transaction based protocol to be compatible with existing IP cores. Experimental results with synthetic test case demonstrate that the proposed architecture outperforms the conventional architecture in term...
Design constraints imposed by global interconnect delays as well as limitations in integration of disparate technologies make 3D chip stacks an enticing technology solution for massively integrated electronic systems. The scarcity of vertical interconnects however imposes special constraints on the design of the communication architecture. This article examines the performance and scalability of different...
Next generation RFID towards ubiquitous wireless sensing and identification requires high network throughput along with long operation range and ultra low energy consumption. In this paper, we review future RFID for ubiquitous intelligence and their technology needs from system to device perspectives. As a promising enabling technology, ultra wideband radio (UWB) and its use in various RFID implementations...
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