The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper, A high-performance low-power low-noise preamplifier working at lower temperature (about 90K) for HgCdTe IR detectors is designed by using a single-ended folded-cascode structure and by using an MOS transistor operating in the linear region as feedback resistor. Its noise characteristics were analyzed and the methods for decreasing noise were put forward. This preamplifier was fabricated...
This paper presents a new tracking circuit design without standby leakage current issue for 2.5V/3.3V tolerant I/O buffer, which is suitable for the I/O cells in the mixed-voltage applications with different driving capabilities. One set of mixed-voltage I/O cell with the new proposed 2.5V/3.3V tolerant I/O buffer circuit has been designed and drawn in a 0.13-mum salicided CMOS process. The new tracking...
A differential transimpedance amplifier combined with a positive feedback compensation circuit tolerates 1.5pF parasitic capacitance from ESD protection in 0.35 /spl mu/m SiGe BiCMOS. A 2.5Gb/s receiver demonstrates 15k/spl Omega/ transimpedance gain and DR from -3 to -23.5dBm while consuming 21mW from a 3V supply.
This paper presents a new aged timing simulation methodology that can be used for hot-carrier reliability assurance of VLSI. This methodology consists of a compact model and a unique algorithm. The ratio based model simplifies the aging I-V characteristics of MOSFET over time into the aged timing and the corresponding ratio at gate-level. A new algorithm is proposed including a gate primitive decomposition...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.