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In this paper, we present a hardware-efficient fast algorithm with a lossless frame recompression scheme and early-level termination strategy for large search range (SR) motion estimation (ME) utilized in beyond high-definition video encoder. To achieve high ME quality for hierarchical motion search, we propose an advanced hierarchical ME scheme which processes the multiresolution motion search with...
Instruction fetching usually consumes more than 50% of total power in embedded processors. In DSP applications, instructions to be fetched may come from loops mostly. This paper proposes a loop unit of low-power microarchitecture for nested looping and it is fully compatible with RISC pipeline architecture. A loop instruction set is designed to finish different kinds of loops. Branching, jumping and...
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