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The pertinent choice of D flip-flop is an indispensible cell in any logic cell library. The transitions in flip-flop dictates power consumption in sensor nodes. Power-Delay-Area are the Figures of Metric (FoM) which decides the choice of flip-flop used in wireless sensor nodes (WSN). In this paper, we identified PowerPC 603 flip-flop as the candidate suitable for WSN after conducting robust analysis...
Subthreshold design has been proposed in the literature as an effective technique for designing signal processing circuits needed in wireless body area network (WBAN) powered by sources with limited energy. The full adder cell forms the basic building block of majority of these signal processing circuits. In this paper, 8-Bit subthreshold Ripple Carry Adders (RCAs) for wireless sensor nodes optimized...
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