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Advancements in nano-scale Integrated Circuits manufacturing technology has resulted in variability of performance metrics. The performance parameters such as Power and Delay are no longer represented deterministically. As a result, circuit designers and manufacturers need to make use of statistical analysis to estimate performance of Integrated Circuits. In this paper we present a new methodology...
On-chip MOS decoupling capacitors (DECAPs) are widely used to reduce power supply noise. Designing DECAP in nanotechnology designs provides many challenges. In this paper first it is shown that all of these challenges are functions of the DECAP channel length. Then, we propose a method for optimizing the channel length of MOS DECAPs. The technique is applied to 45 nm and 32 nm technology nodes and...
In this paper, we investigate the temperature dependence of delay propagation characteristic of FinFET circuits. The study is performed on several digital circuits including inverter, NAND, NOR, XOR and full-adder implemented in a 32-nm FinFET technology. The results show that the speed of the FinFET circuits is enhanced when the temperature is increased. The temperature dependencies of the FinFET...
In this paper, a low-power high-performance logic style for low-voltage CMOS technologies is presented. The style is based on modifying a high-speed yet low-power logic family called feedthrough logic (FTL) style which has been previously proposed in the literature. The proposed style which is called parallel FTL (PFTL) overcomes the shortcoming of the FTL for low-voltage applications. To assess the...
trans-trans-2,5-Bis-[2-{5-(2,2 -bithienyl)}ethenyl] thiophene (BTET) was synthesized and then purified in a gradient sublimation system. It was characterized using IR, UV-Vis and mass spectroscopy, and elemental analysis. BTET films were deposited with molecular beam deposition (MBD) or spin-coating from solution. Insulated-gate field-effect transistor (IGFET) devices based on such films were used...
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