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This work reports a new wafer-level post-CMOS process with double-side DRIE for fabricating high-sensitivity, thermally stable capacitive accelerometers. The resultant sensor structures have high aspect ratio (beams with 2.5 µm gaps and 56.2 µm beam thickness comprising 5 µm metal-oxide layers and 51.2 µm single-crystal silicon layer) and show the insensitivity to residual stress and temperature change...
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