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Beyond-CMOS devices concepts are greatly dependent on new functional materials to provide inspiration and innovation beyond the silicon status quo. Here, we propose a material framework specifically for beyond-CMOS devices. In doing so, material system examples and data points presented are taken from the Center on Functional Accelerated Nanomaterials Engineering, the STARnet Center of Excellence.
We have achieved high device performance in self-aligned inversion-channel InGaAs MOSFETs, as well as a CET of <; 1 nm, a Dit ≤ 1011 eV-1cm-2, and high-temperature thermal stability withstanding >850°C RTA in GGO and a CET of <; 1 nm in ALD-HfO2 on InGaAs. Remarkable device performances in self-aligned, inversion-channel Ge MOSFET using GGO without any interfacial passivation layers (IPLs),...
The semiconductor industry will soon be launching 32 nm complementary metal oxide semiconductor (CMOS) technology node using 193 nm lithography patterning technology to fabricate microprocessors with more than 2 billion transistors. To ensure the survival of Moore's law, alternative patterning techniques that offer advantages beyond conventional top‐down patterning are aggressively being explored...
The surface Fermi level unpinning in InGaAs has been realized with high kappa dielectric growth using molecular beam eitaxy (MBE) and atomic layer deposition (ALD). Furthermore, world-record device performances in self-aligned inversion-channel InGaAs MOSFET and a capacitance equivalent thickness (CET) of les 1 nm in Ga2O3(Gd2O3) and ALD-HfO2 on InGaAs have been achieved.
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