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This paper proposes an on-chip differential- transmission-line (DTL) interconnect to reduce delay and power consumption in long global interconnects. The DTL interconnect can transmit signals at near light-of-speed with small power dissipation of Tx. The proposed DTL interconnect consists of Tx, DTL and Rx, and an asymmetric Tx is employed to reduce offset delay in Tx. In the measurement result, 5...
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