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Tensor transposition, a generalization of matrix transposition, is an important primitive used when performing tensor contraction. Efficient implementation of tensor transposition for modern node architectures depends on various architecture capabilities such as cache and memory hierarchy, threads, and SIMD parallelism. This paper introduces a framework that uses static analysis and empirical autotuning...
This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. The technique permits background loading of configuration data without interrupting the regular execution, overlapping computation with reconfiguration. And stored configurations can...
A SystemC based emulator architecture optimized for reconfigurable array processor is proposed. With novel architecture, the emulator support performance evaluation, rtl co-simulation as well as system software development. The emulator has been used in the development of a reconfigurable multimedia application processor (ReMAP) which has been successfully fabricated under SMIC 0.18 um processing.
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