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We report record results for III-V gate-all-around devices fabricated on 300mm Si wafers. A gm of 2200 μS/μm with an SSsat of 110 mV/dec is achieved for an Lg=50nm device using a newly developed gate stack interlayer material deposited by ALD. In addition it is shown that high pressure annealing can further improve device performance with an average increase in gm of 22% for a 400 °C anneal.
We demonstrate excimer laser annealed dopant segregated Schottky (ELA-DSS) junction on gate-all-around (GAA) silicon nanowire pFETs. The metal-semiconductor junction interfacial doping is increased by two-fold with the ELA method. On silicon nanowire, the method achieves an effective Schottky barrier height (SBH) of nearly zero, improves the short channel performance and reduces the parasitic resistance...
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