The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper presents a survey and a classification of architectures for analog-to-digital converter (ADC) targeting digital control for high-frequency switching DC-DC power converters. Previously presented designs are identified as particular cases of the proposed classification. An ADC architecture with direct binary code output is also proposed and uses simple encoder to convert exponentially weighted...
Without adopting encoder to convert "thermometer code" into binary code, analog-to-digital converter (ADC) architecture with direct binary code output is proposed for digital controllers of high-frequency switching mode power supply (SMPS). It can provide large conversion ranges with required precision and reduce ADC circuit complexity. The output can be compressed into a much shorter addressing...
Without adopting encoder to convert "thermometer code" into binary code, analog-to-digital converter (ADC) architecture with direct binary code output is proposed for digital controllers of high-frequency switching mode power supply (SMPS). It can provide large conversion ranges with required precision and reduce ADC circuit complexity. The output can be compressed into a much shorter addressing...
Without adopting encoder to convert "thermometer code" into binary code, a flash analog-to-digital converter (ADC) architecture with direct binary code output is proposed for digital controllers of high-frequency power converters. It can provide a large regulation range with required high precision and the low complexity of the logic circuit implementation leads to small chip area. The output...
An 8-bit 250MSPS flash A/D converter using 0.35mum BiCMOS process is presented in the paper. A novel sample-and-hold amplifier is used to improve sampling rate of the A/D converter, and the amount of input capacitors and equal resistor network is reduced by using an interpolating technique. Tri-input AND gate, latch and coding network are designed to overcome bubble and sparkle codes. Operating at...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.