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A 3.1-4.8GHz two-stage LNA for Group-1 UWB applications featuring current reuse, resistive feedback, complete and high ESD protection design is reported. ESD-RFIC co-design technique was used to ensure whole-chip optimization. The design is implemented in a foundry 0.18μm RFCMOS. Measurement shows a gain of 13.2dB/14.0dB, excellent input reflection of -13.4dB/-17.5dB, noise figure (NF) of 5.11dB/4...
RF ESD protection circuitry design emerges as a big challenge to RF IC design, where the main problem is associated with performance degradation of RF IC due to ESD-induced parasitics. It has been difficult to incorporate the ESD impacts into RF IC design due to lack of proper co-design approach and ESD device models. This paper presents a new ESD-RFIC co-design methodology, including RF ESD design...
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