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A fully integrated power amplifier (PA) at K-band implemented in 0.18-μm CMOS process is presented. With appropriate prematch of power cells and high gain driver stage network design, the power amplifier performs 22.5 dB peak gain and saturation output power of 20.1 dBm. The 3-dB gain bandwidth is from 18-23 GHz, while the output power at 1-dB compression point (OP1dB) from 19-22 GHz is over 15 dBm...
A balanced PA covering 68-83 GHz is developed in 90 nm CMOS. Using wideband power matching topology, the PA achieves power gain of greater than 18.1 dB from 68 to 83 GHz and gain flatness within 0.2 dB from 68 to 78 GHz. The PA has a maximum saturation output power of 14 dBm at 70 GHz, and greater than 11.8 dBm from 68 to 83 GHz. The best P1dB is 12 dBm at 68 GHz, and greater than 8.3 dBm from 68...
This paper presents a chip set of RF front-end circuits using 65-nm CMOS technology. The chip set includes a LNA, a down-conversion mixer, an up-conversion mixer and a medium power amplifier. The LNA has the 3-dB bandwidth from 68 to 75 GHz with a peak value of 17 dB. The down-conversion mixer has a conversion loss of better than -5 dB from 53 to 73 GHz at 4 dBm LO power. The up-conversion mixer has...
A 50 to 70 GHz wideband power amplifier (PA) is developed in MS/RF 90 nm 1P9M CMOS process. This PA achieves a measured Psat of 13.8 dBm, P1dB of 10.3 dBm, power added efficiency (PAE) of 12.6%, and linear power gain of 30 dB at 60 GHz under VDD biased at 1.8 V. When VDD is biased at 3 V, it exhibits Psat of 18 dBm, P1dB of 12 dBm, PAE of 15%, and linear gain of 32.4 dB at 60 GHz. The MMIC PA also...
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