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In this paper, a high-gain and wideband low-noise amplifier using 65-nm CMOS process is proposed. A four-stage cascode configuration is adopted to achieve the high gain and wideband performance. With 24-mA dc current and 2-V supply voltage, the LNA not only provides gain higher than 20 dB from 75.5 GHz to 120.5 GHz, but also has a measured noise figure between 6 and 8.3 dB from 87 to 100 GHz. The...
In this paper, a miniature Q-band low noise amplifier (LNA) is demonstrated using 0.13-mum CMOS technology. The triple-cascode topology is utilized to achieve a high gain performance with a compact size. In addition, two inductors are placed between the cascode devices to reduce the noise and enhance the stability of the LNA. The LNA presents a maximum small signal gain of 12.6 dB and a minimum noise...
This paper presents a chip set of RF front-end circuits using 65-nm CMOS technology. The chip set includes a LNA, a down-conversion mixer, an up-conversion mixer and a medium power amplifier. The LNA has the 3-dB bandwidth from 68 to 75 GHz with a peak value of 17 dB. The down-conversion mixer has a conversion loss of better than -5 dB from 53 to 73 GHz at 4 dBm LO power. The up-conversion mixer has...
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