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A low power test-per-clock built-in self-test (BIST) scheme based on 2-bit TRC is presented in this paper. The low power during testing can be obtained by selectively activating multi 2-bit twisting ring counters (AM2B-TRC). The optimal number of activated 2-bit twisting ring counters is also explored in this paper. Experimental results based on ISCAS'85 benchmark circuits show that the proposed low...
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