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A low power test-per-clock built-in self-test (BIST) scheme based on 2-bit TRC is presented in this paper. The low power during testing can be obtained by selectively activating multi 2-bit twisting ring counters (AM2B-TRC). The optimal number of activated 2-bit twisting ring counters is also explored in this paper. Experimental results based on ISCAS'85 benchmark circuits show that the proposed low...
This paper studies a large supermarket chains, which using of logistics simulation software ExSpect to test the model performance and simulation experiment. It constructs logistics distribution business process model based on Petri net tools, analyzes the enterprise distribution business process, and then puts forward the improvement process optimization scheme according to the simulation data. Comparing...
Time domain interleaved partitioning partial transmit sequence method (TD-IP-PTS) needs only one inverse fast Fourier transform (IFFT) to reduce peak-to-average power ratio (PAPR) of orthogonal frequency division multiplexing (OFDM) system. However, for one long OFDM symbol, it will need waiting time and many registers to implement the combination of phase factor in TD-IP-PTS. Therefore, the speed...
Partial transmit sequence (PTS) scheme is an attractive technique for peak-to-average power ratio (PAPR) reduction in orthogonal frequency division multiplexing (OFDM) systems. However it needs many candidates to obtain preferable PAPR performance, which will result in high computational complexity. In order to alleviate the problem, this paper proposes a novel partial transmit sequence (PTS) technique,...
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