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Apart from the speed performance, a common IC-implementation problem for nearest neighbor search, one of the most basic algorithms in pattern recognition, is low flexibility to different task applications. We report a digital word-parallel as sociative memory architecture with reconfigurable storage-space of reference vectors and clock-counting-based nearest-Euclidean-distance search, enabling single-chip...
A novel configurable frequency synthesizer based on delay-locked-loop (DLL) is presented in this paper, with maximum multiplication factor 10 and maximum division factor 16. A SRAM is employed to store configuration data for different multiplication and division factor. Users only need to change the data stored in the embedded SRAM to obtain frequency needed. The output frequency range is from 25...
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