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In this paper, we aim to develop an efficient speculation framework for a heterogeneous cluster. Speculation is a common mechanism that identifies ‘slow’ node in a cluster and starts redundant tasks on other nodes to guarantee the reliability. We consider MapReduce/Hadoop as a representative computing platform, and our general goal is to accurately and quickly identify the straggler nodes during the...
Technical innovation drives the low power consumption requirements in ASIC design. This paper presents a SD card controller, in which two asynchronous units (BIU and CIU) are included for lower power structure. Adding low power mode to finite state machine makes this controller to shut down if no data or command is transferring for a long time. Only one FIFO is used to store temporary data in order...
Nowadays, traditional ASIC design methodology shows its limitations to meet the short time-to-market which is the hallmark of modern consumer electronic products, and great interests have been focused on high-level synthesis (HLS) in the past two decades. In this paper, the scheme for generation of the memory architecture in a novel HLS method named operator design methodology is proposed. The principle...
Non-recurring-engineering (NRE) and time-to-market play an increasingly important role in the field of IC design. Meanwhile, with the continuous development of IC manufacturing technology, it is necessary to propose a novel design methodology to shorten design cycle and enhance design efficiency. In this paper, operator design methodology (ODM) is presented and an H.264 encoder is implemented as a...
Nowadays, with the processing technology of integrated circuits(IC) developing into deep sub-micron size and the scale of IC running into VLSI, the existing IC design methodology can hardly meet the demands for short time-to-market and continuous increasing functionality of IC products. Facing with these challenges, researchers all around the world have been chasing rapid design methods such as reconfigurable...
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