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Physical Unclonable Function {PUF) is severely threatened by modeling attacks. This paper proposes a novel Polymorphic PUF for CPU+FPGA SoC. We fully exploit the dynamic reconfigurability of the SoC to minimize the Challenge Response Pair (CRP) correlation so as to resist modeling attacks. An asymmetric RO pair is proposed to produce the response. Experiments on real CPU+FPGA SoCs show the high resistance...
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