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A compact model for SOI-MOSFET with ultra-thin both SOI and BOX layers has been developed base on the potential distribution within the device. The potential distribution is calculated by solving the Poisson equation together with additional analytical equations derived under approximations. All equations are solved simultaneously by the Newton iteration method. It is demonstrated that the model can...
A compact model (CM) for fin-type FETs (FinFETs) was successfully developed and applied to variability analysis of a fabricated state-of-the-art metal-gate (MG) FinFET. By combining the statistical measurements with the CM calibration, Vth variation was, for the first time, broken down into structure-based (silicon fin thickness and gate length) and material-based (gate work function) components...
Research is reported that aims at a framework for efficient development of multi-gate MOSFET models for circuit simulation and is carried out in an international collaboration among different research teams. A common platform for compact-model development, based on the Verilog-A language, is also constructed to verify as well as to efficiently merge the individual contributions from each collaborator...
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