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Locks are widely used as a synchronization method to guarantee the mutual exclusion for accesses to shared resources in multi-core embedded systems. They have been studied for years to improve performance, fairness, predictability etc. and a variety of lock implementations optimized for different scenarios have been proposed. In practice, applying an appropriate lock type to a specific scenario is...
With an emerging market of ARM embedded processors and rapidly updating techniques used in manufacture process of FPGA, the structure of CPU combining with FPGA is increasingly attracting attention, such as the Zynq SoC heterogeneous computing platform developed by Xilinx which integrates a dual-core Cortex-A9 ARM processor and a FPGA in one chip. In this paper, we propose an 4-node Zynq based stacked...
Software diagnosis on MPSoCs, the process of finding functional bugs or performance inefficiencies in complex hardware-software systems, is challenging. As both software and hardware complexity grow, the software observability decreases. At the same time, understanding the intended software behavior has become more difficult. We present an integrated approach which combines domain-specific representations...
Dataflow modeling techniques facilitate many aspects of design exploration and optimization for signal processing systems, such as efficient scheduling, memory management, and task synchronization. The lightweight dataflow (LWDF) programming methodology provides an abstract programming model that supports dataflow-based design and implementation of signal processing hardware and software components...
Data locality in distributed memories has a significant performance impact on NUMA multi-core systems owing to non-uniform memory accesses. In addition, memory contention also influences the performance of multi-core systems. The performance degradation caused by both effects should be analyzed before performance optimization because data locality and memory contention are mutually dependent. A reduction...
Linux Unified Key Setup (LUKS) is a popular disk encryption specification for Linux operating system. It is the first time to implement the operations of LUKS with regard to FPGA architectures, which includes PBKDF2-SHA1 and AES128-ECB cipher. The application of this implementation to LUKS password recovering is verified with ARM processor in Zynq SoC. In order to compare the performance against other...
Contention for shared resources is a major performance issue in multicore systems. In embedded multicore microcontrollers, contentions of program flash accesses have a significant performance impact, because the flash access has a large latency compared to a core clock cycle. Therefore, the detection and analysis of program flash contentions are necessary to remedy this situation. With a lack of existing...
Angle measurement is the key technology of digital control and angular position tracking in servo system. For the problem of low accuracy of angle measurement and error in coarse-fine data coupling, data fusion was applied in the double-channel angle measurement system. The angle was simultaneously measured by coarse channel and fine channel, then the coarse data and fine data was coupled by data...
NROM is one of the emerging non-volatile-memory technologies, which provides very high data density, low fabrication cost, and better value stability. It is also promising for replacing current floating-gate-based non-volatile memory such as flash memory. In order to raise the fabrication yield and enhance its reliability, a novel test and repair flow is proposed in this paper. Instead of the traditional...
In view of the current situation of the computer equipment in our library, use the fuzzy AHP method to comprehensive evaluate the advanced degree of computer equipment in our library, draw a conclusion: the advanced degree of computer equipment in our library is in the medium level, and propose the corresponding solutions to improve the situation.
In this paper, we study the RFID tag-reader mutual authentication scheme. A hardware design of an RFID authentication protocol conforming to EPC Class 1 Generation 2 Standards is proposed. The proposed RFID tag-reader mutual authentication protocol was simulated using Modelsim XE II and synthesized using Altera's Quartus II software. The system has been successfully verified in hardware using an Altera...
Wireless sensor network (WSN, Wireless Sensor Network) is a kind of autonomous network with sensor nodes. It is different from traditional RFID system that the WSN is through the distribution of sensor nodes in different locations to monitor environmental conditions. The collected data from sensor nodes were sent back to the base station for further analysis and processing to compensate the shortage...
In this paper, an integrated scheduling algorithm of unicast and multicast is presented for providing QOS service and handling the mixed data of unicast and multicast. The key idea is to schedule the six QOS types independently and in parallel, and schedule the unicast and multicast by a single integrated algorithm, then arbitrate among them for accessing to the switching fabric. The QOS mechanism...
Efficient architectures for realizing MDCT/IMDCT are presented. Based on the symmetry property of trigonometric functions, N-point MDCT formula was transferred into an odd-even index paralleling process which can be achieved by two different types of decomposition, recursive formed DCT-II kernel or FFT-based DCT-IV kernel. Then a butterfly unit is employed to accelerate the computational speed. Furthermore,...
In this paper, we present a low power strategy for test data compression that is called ldquobreak-independent-table (BIT) encodingrdquo. In addition, we present a new decompression scheme for test vectors that is called ldquotest slice difference techniquerdquo to solve huge test data volume that must be stored in the tester memory. About how reducing power dissipation problem, we present an extremely...
This paper presents an input test data compaction and scan power reduction technique. We present new design for testability (DFT) method to hold values when some of test data in test cubes are not need to be changed. In our implementation, we present new algorithm called 2-D compaction to compact test cubes as less as possible and fill unspecified bits with specified value when necessary. Experimental...
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