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In recent years, special attention has been paid to slot-based reconfigurable devices interconnected by NoCs (networks on chip). An urgent problem is how one reallocatable task can communicate with others. This paper proposes two approaches to augment NoC for slot-based reconfigurable system by adding a naming module to solve this problem. In the first approach, the naming module is outside of the...
This paper presents an area-efficient BCH decoder for DVB-S2 system. The proposed architecture can support all 11 code rates in DVB-S2. Based on the modified Euclidean algorithm (MEA), The BCH decoder has a low hardware complexity with the folding and degree computationless architecture in key equation solver (KES) block. Further more, the multiplier in Galois Field is also optimized to reduce the...
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