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A synchronization-free, and all digital design technique for the generation of a spread spectrum clock is presented and simulated in 0.35 μm CMOS technology with a low power consumption of 1.45 mW at 10 MHz. The proposed technique uses a period locking delay-locked loop, multiple phase generator, and a digital controller to modulate the input clock frequency. The peak power of the clock and the supply...
A circuit design technique is presented which is able to suppress large EMI (electromagnetic interference) radiated by the power supply lines. Implemented in AMIS 0.35-mum I3T80 process, the proposed circuit can suppress maximum 35-dB di/dt noise at high frequency with only 30-muA quiescent current and 100 pF output capacitance fully integrated on chip. Measurement results show that the developed...
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