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Interposer-based 2.5D integrated circuits (ICs) are seen today as a precursor to 3D ICs based on through-silicon vias. This paper describes some of the major challenges related to testing of 2.5D ICs and presents some solutions to these problems. We first describe a test architecture using e-fuses for pre-bond interposer testing. We next present an efficient built-in self-test (BIST) technique that...
Interposer-based 2.5D integrated circuits (ICs) are seen today as a precursor to 3D ICs based on through-silicon vias (TSVs). All the dies in a 2.5D IC must be adequately tested for product qualification. However, due to the limited number of package pins, it is a a major challenge to test 2.5 ICs using conventional methods. Moreover, due to higher integration levels, test-application time and test...
Three-dimensional (3D) integration using through-silicon vias (TSVs) promises higher integration levels in a single package, keeping pace with Moore's law. Despite the promise and benefits offered by 3D integration, testing remains a major obstacle that hinders its widespread adoption. This paper examines the hype, myths, and realities of 3D IC testing. We describe a number of testing and DfT challenges,...
This study utilizes the unmanned aerial vehicle (UAV) to acquire high resolution images for feature matching, resulting in a point cloud. A progressive morphological filter is used to filter out nonground object points from point cloud. Multi-scale and different shape filter windows are adopted for the morphological filter to achieve good performance. The results show that multi-scale and multi-shape...
We address the problem of efficient image matching for large, highly redundant photo collections with highly complex topologies, such as photos acquired by unmanned aerial vehicles (UAV), focusing on disaster monitoring. Our approach conducts a skeleton graph which simplifies the image topology with the consideration of image importance and topological relationship. We define the image with the highest...
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