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The performance and power efficiency of high-end servers benefit from dense system integration. Accordingly, we introduce a scalable packaging platform supporting high-performance chip stacks, as a continuation in server-system density scaling.
This paper addresses both, the thermal and the thermo-mechanical performance of percolating thermal underfill applied flip-chip packages. We present a thermal test platform in flip-chip package design allowing the thermal conductivity of any underfill to be measured at package scale. We give details about design technology and current fabrication status. We benchmarked the thermal performance of the...
Heat dissipation in 3D chip stacks suffers from multiple thermal interfaces. The effective thermal resistance of the bond-line between individual dies, with the electrical interconnects can be minimized by the introduction of thermal conductive underfills. Up to now, only sequentially formed underfills result in true percolation and hence, thermal conductivities of more than 1 W/m-K. In this study,...
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