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RFIC reliability is fast becoming a major bottleneck in the yield and performance of modern IC systems, as process complexity and levels of integration continually increase. Due to high frequencies involved, testing these chips is both complicated and expensive. While the areas of automated testing and self-test have received significant attention over the past few years, no formal framework of fault-models...
Increasing process variations and tolerance limits with successive scaling, along with rising costs per design cycle have made the fault-tolerance paradigm pertinent in RFICs. Due to the high frequencies involved, traditional fault-tolerance methods used in digital and lower frequency analog circuits cannot be applied. This paper presents a non-intrusive and robust technique of self-calibrating the...
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