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A novel circuit structure of a common-gate single-stage low-noise amplifier (LNA) has been proposed in this work. The LNA has been designed for Ku-Band (12 to 18 GHz) applications using the TSMC 0.18-μm CMOS process. New analytical expressions have been derived for the noise factor of a common-gate LNA. A minimum noise figure (NF) of 4.86 dB and a maximum S21 of 10.55 dB has been obtained for the...
A 5-GHz CMOS fractional-N frequency synthesizer with a delta-sigma modulator is designed in this paper. The frequency dividers are composed of an injection-locked frequency divider and a programmable divider. In consideration of low power consumption, we use an injection-locked frequency divider as the first stage prescaler. The loop filter is a second-order passive filter. The delta-sigma modulator...
In this work, a novel integrated Doherty power amplifier in 0.18 mum CMOS process is presented for potential WiMax applications at 3.5 GHz. Doherty configuration with cascode transistors is adopted to achieve high efficiency and output power. The integrated diode linearizer is first demonstrated to use on the cascode transistor to improve the linearity of Doherty PA. The proposed power amplifier provides...
In this paper, a low-voltage CMOS quadrature up-conversion mixer for 5-GHz wireless communication applications is designed. The simulation results demonstrate the mixer can reach a high conversion gain (CG), a low noise figure (NT), and a high linearity (IIP3). A miniature lumped- element microwave broadband rat-race hybrid and RLC shift network are used for the LO and the IF port design, respectively...
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