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A nano-power power-on-reset (POR) circuit for passive RFID tag is presented in this paper. It is applied to a passive UHF C1G2 RFID tag ICs fabricated in a 90-nm CMOS technology. Measurement results confirm that the generated POR pulse signal is accurate and reliable due to the proposed hysteresis-comparator structure and power-off auto-discharging path. Moreover, the POR circuit consumes 150-nA quiescent...
A passive UHF RFID tag's baseband processor design with energy-aware structure is presented in this paper, based on EPC C1G2 protocol. For the consideration of limited availability of power and low-voltage supply, ripple-binary mixed counter and compensated addition are proposed for the PIE decoder. And in the clock generator for tag-to-reader uplink, Galoi linear feedback shift register (LFSR) is...
This paper presents a low-power, passive, EPCtrade C1G2-compatible UHF RFID tag design implemented in a 90 nm CMOS technology. In order to reduce its cost, diode-connected NMOSFETs in a standard CMOS technology is used instead of Schottky diodes. A sub-1 V, low temperature-coefficient voltage reference, using self-biased mutual compensation without large resistors, is proposed to save the chip area...
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