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In this paper, we present a dynamic load-balancing algorithm for optimistic gate level simulation making use of a machine learning approach. We first introduce two dynamic load-balancing algorithms oriented towards balancing the computational and communication load respectively in a Time Warp simulator. In addition, we utilize a multi-state Q-learning approach to create an algorithm which is a combination...
As a consequence of Moore's law, the size of integrated circuits has grown extensively, resulting in simulation becoming the major bottleneck in the circuit design process. In this paper, we examine the performance of a parallel Verilog simulator on large, real designs. As previous work has made use of either relatively small benchmarks or synthetic circuits, the use of these circuits is far more...
We developed a 3D parallel full band Monte Carlo simulator for semiconductor devices. This enables us to simulate 3D devices on high performance multiprocessor machines. By utilizing the JASMIN software package, parallel execution issues such as processors communication, grid partitioning and load balancing are handled easily and efficiently. The 3D MC simulator is validated by comparing its results...
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