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In order to suppress overvoltage of power devices and noise voltages of inverters, it is essential to analyze the DC-side inductance of the inverter. This paper presents a design procedure of an optimum structure for a 10-kV, 400-kVA three-level inverter. Rather than using 3D-FEM software, the bus bar inductance for the medium voltage inverter is calculated based on a partial inductance method. An...
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