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This paper reports In0.53Ga0.47As quantum-well MOSFET with source/drain regrowth for logic applications. For a device with Lg=100nm and EOT of 1.1nm, Ion=550µA/µm at 0.5V and fixed Ioff=100nA/µm, peak gm,ext=2.21mS/µm, and SS=82mV/dec at Vds=0.5V are obtained. Minimum SS at Vds=0.5V remains 80–87mV/dec for all gate lengths from 500nm to 75nm. To our knowledge, these are the best planar InGaAs-channel...
Beside the VTH-tunability, a raised SiGe S/D module offers higher LG-scalability than an embedded SiGe S/D in SiGe-IFQW pFETs. In-depth transport study of record performing 1.5mA/µm-ION strained-SiGe IFQW pFETs reveals that mobility improvement is still the key performance booster whereas LG-scaling has limited impact.
A 2nd generation of Implant Free Quantum Well pFETs is presented in this work. SiGe25%-embedded Source/Drain was implemented, leading to an excellent short channel control and logic performance (1mA/um-ION@-1V). No narrow-width effect was found and a multi-VTH strategy is also offered. Performance of the strained-IFQW pFETs was finally demonstrated at lower VDD.
A novel RFCV-technique is applied to directly quantify the short channel devices at high Vds, enabling parameter extraction like velocity saturation and critical field. This technique is applied to benchmark Si (110) and Si(100) as well as Ge devices. Similarities and crucial differences between short channel parameters in Si and Ge are discussed.
Ge pMOSFETs with gate lengths down to 125 nm are fabricated in a Si-like process flow. The addition of a halo implant reduces VT roll-off from 207 mV to 36 mV, and DIBL from 230 mV/V to 54 mV/V. Ion of 770 muA/mum is attained for Ioff of 8.8 nA/mum at VDD = -1.5 V, when evaluating from the source. Benchmarking shows these Ge pMOSFETs have the potential to outperform their (strained) Si counterparts...
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