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In this paper, a built-in electrical test circuit is proposed to detect an open defect at an interconnect between a land on a printed circuit board and an IC. The test circuit is made of an integrating circuit, nMOS switches and a switch control circuit. A time-varying signal generated by the integrating circuit is provided to a targeted interconnect as a stimulus signal in the tests. An input buffer...
In this paper, we propose block-level replacement techniques for content-addressable memories. The CAM array is first divided into row banks and column banks. Then, for each divided array (the overlapped CAM cells of a row bank and a column bank), two redundant row blocks are added and reconfiguration is performed at the block level instead of the conventional word level. According to simulation results,...
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