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RF and DC characterization of vertical InAs nanowire MOSFET on Si substrates are presented. Nanowire arrays are epitaxially integrated on Si substrates by use of a thin InAs buffer layer. For device fabrication, high‐k HfO2 gate dielectric and wrap‐gates are used. Post‐deposition annealing of the high‐k is evaluated by comparing one annealed and one not‐annealed sample. The annealed sample show better...
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