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A fully self-duty-cycled and synchronized UWB pulse-radio receiver SoC targeted at low-data-rate communication is presented. The receiver uses pulse-radio UWB in the 3.6–5 GHz band to achieve a high energy efficiency. The proposed architecture employs a a demodulator with an automatic analog threshold-recovery and an all-digital clock-and-data-recovery synchronizer. The SoC synchronizes with the incoming...
A stackable switched-capacitor (SC) converter IC for a hybrid-SC-resonant LED driver using off-chip ceramic capacitors is presented in this paper. The IC can be configured to handle a range of input voltages through chip-stacking in the voltage domain. The tested driver delivers 17.6W at 470mA to the LED load with 90% peak efficiency from a rectified 120VAC line (170VDC) and maintains >85% efficiency...
Scale the Supply, Reduce the Area and Use Digital Gates: We focus on three themes aimed at designing analog and RF interface circuits in digital nanoscale CMOS processes. Design techniques for analog and RF circuits operating well below IV can keep them compatible with future low power SOCs. Scaling the size of RF circuits and reclaiming the space under inductors is necessary to reduce area and cost...
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