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Neuromorphic circuit can be simplified by applying stochastic computing, which uses a bit stream. A large number of stochastic number generators (SNGs) allows independent bit streams and hence secures accuracy, but outweighs the advantage of stochastic computing in circuit area. An area efficient SNG design method is proposed, in which a single linear feedback shift register (LFSR) is shared among...
Almost all digital circuits designed these days are synchronous ones. A clock is responsible for synchronization and is distributed via clock (distribution) network, which requires significant design time and effort and incurs extra area and wirelength. We advocate that synchronous circuit can be designed without clock network. Instead, power supply Vdd network is made to carry periodic negative pulses...
Utilizing pulsed latches in a circuit is one emerging solution to timing improvements. Pulsed latches, driven by a brief clock signal generated from pulse generators, possess superior design parameters over flip-flops. If pulse generators and pulsed latches are not placed properly, however, pulse-width degradations at pulsed latches and thus timing violations might occur. In this paper, we introduce...
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