Search results for: Eby G. Friedman
Power Distribution Networks with On-Chip Decoupling Capacitors > Final Comments and Supplementary Material > 583-587
Power Distribution Networks with On-Chip Decoupling Capacitors > Noise in Power Distribution Networks > 303-311
Lecture Notes in Computer Science > Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation > Session 12: Digital Design (Poster) > 750-759
Power Distribution Networks with On-Chip Decoupling Capacitors > Noise in Power Distribution Networks > 361-361
Power Distribution Networks with On-Chip Decoupling Capacitors > Multi-Voltage Power Network Systems > 549-577
Power Distribution Networks with On-Chip Decoupling Capacitors > Placement of On-Chip Decoupling Capacitance > 423-432
Integrated Circuits and Systems > 3D Integration for NoC-based SoC Architectures > Technology and Circuit Design > 89-114
Power Distribution Networks with On-Chip Decoupling Capacitors > Placement of On-Chip Decoupling Capacitance > 433-433
IFIP — The International Federation for Information Processing > VLSI-SoC: Design Methodologies for SoC and SiP > 1-21
Power Distribution Networks with On-Chip Decoupling Capacitors > Multi-Layer Power Distribution Networks > 459-485
Power Distribution Networks with On-Chip Decoupling Capacitors > Placement of On-Chip Decoupling Capacitance > 367-397
Power Distribution Networks with On-Chip Decoupling Capacitors > Noise in Power Distribution Networks > 349-359