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In this letter, we demonstrate the optimization of localized silicon-on-insulator and the functionality of devices on (110) silicon substrates. The influence of several channel directions (i.e., 15 , 30 , 45, and 60 away from the [001] direction) on both hole mobility and electron mobility has been investigated. Finally, the electrical characteristics of 55-nm-gate-length...
This paper highlights the successful co-integration of Localized Silicon-On-Insulator (LSOI) devices and of bulk-Si I/O devices on the same chip. LSOI devices present good logic performances and very low mismatch values down to 1.2mV/μm. In addition, we show the backbiasing impact on LSOI SRAM bit-cells for stability improvement. This work also presents the co-integration of LSOI with bulk devices...
The objective of this paper is to present the successful co-integration of Logic Ultra-Thin Body and Box (UTBB) devices and bulk-Si I/O devices on the same chip. The UTBB transistors are integrated locally on a Bulk wafer with the Localized Silicon On Insulator (LSOI) process technology with HfO2/TiN gate stack for low power applications. I/O co-integrated Bulk devices have a thicker interfacial SiO...
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