The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Presented is a systematic approach for the layout optimisation of a Si-based power device by a distributed large model considering all the layout parasitic components resulting from the interconnections. The optimisation in terms of gain, PldB and PAE is shown with the SiGe power devices. Using the optimised power devices, a preliminary two-stage power amplifier was implemented for PCS application.
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.